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This page describes the semantics of x86 instructions such as
Performs a serializing operation on all load-from-memory and store-to-me= mory instructions that were issued prior the MFENCE instruction. This seria= lizing operation guarantees that every load and store instruction that prec= edes the MFENCE instruction in program order becomes globally visible befor= e any load or store instruction that follows the MFENCE instruction.1 The M= FENCE instruction is ordered with respect to all load and store instruction= s, other MFENCE instructions, any LFENCE and SFENCE instructions, and any s= erializing instructions (such as the CPUID instruction). MFENCE does not se= rialize the instruction stream.
Weakly ordered memory types can be used to achieve higher processor perf= ormance through such techniques as out-of-order issue, speculative reads, w= rite-combining, and write-collapsing. The degree to which a consumer of dat= a recognizes or knows that the data is weakly ordered varies among applicat= ions and may be unknown to the producer of this data. The MFENCE instructio= n provides a performance-efficient way of ensuring load and store ordering = between routines that produce weakly-ordered results and routines that cons= ume that data.
Performs a serializing operation on all store-to-memory instructions tha= t were issued prior the SFENCE instruction. This serializing operation guar= antees that every store instruction that precedes the SFENCE instruction in= program order becomes globally visible before any store instruction that f= ollows the SFENCE instruction. The SFENCE instruction is ordered with respe= ct to store instructions, other SFENCE instructions, any LFENCE and MFENCE = instructions, and any serializing instructions (such as the CPUID instructi= on). It is not ordered with respect to load instructions.
Weakly ordered memory types can be used to achieve higher processor perf= ormance through such techniques as out-of-order issue, write-combining, and= write-collapsing. The degree to which a consumer of data recognizes or kno= ws that the data is weakly ordered varies among applications and may be unk= nown to the producer of this data. The SFENCE instruction provides a perfor= mance-efficient way of ensuring store ordering between routines that produc= e weakly-ordered results and routines that consume this data.
Performs a serializing operation on all load-from-memory instructions th= at were issued prior the LFENCE instruction. Specifically, LFENCE does not = execute until all prior instructions have completed locally, and no later i= nstruction begins execution until LFENCE completes. In particular, an instr= uction that loads from memory and that precedes an LFENCE receives data fro= m memory prior to completion of the LFENCE. (An LFENCE that follows an inst= ruction that stores to memory might complete before the data being stored h= ave become globally visible.) Instructions following an LFENCE may be fetch= ed from memory before the LFENCE, but they will not execute until the LFENC= E completes.
Weakly ordered memory types can be used to achieve higher processor perf= ormance through such techniques as out-of-order issue and speculative reads= . The degree to which a consumer of data recognizes or knows that the data = is weakly ordered varies among applications and may be unknown to the produ= cer of this data. The LFENCE instruction provides a performance-efficient w= ay of ensuring load ordering between routines that produce weakly-ordered r= esults and routines that consume that data.